>For ex. every L/D calculation takes a few sec. and they are all done in
>parallel.
If you can implement the L/D calculation in a FPGA, it's an achievement on its own. So far no one has be able to do it.
>This is not so hard as it sounds, neither does it take too many gates when
>you design the system right. It sound a bit like a broken record but I
>designed my "chain engine" for FPGA implementation. It is stack-based and
>most data structures are bitboards. When a group is captured, a flag is set
>to inactivate that slot on the stack. When an undo is done, the stack
>pointer is decremented etc.
>When you implement bitboards on a FPGA, you use 361-bit registers of course.
>You can put an eyeshape library in the FPGA and match them in 4 rotations
>and 2 mirrorings in parallel with a bitboard as a single operation.
These are the low level functions I refered to. They are not enough. Higher level functions are needed.
Daniel Liu
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