>My experience is in ASIC design where you
>have much more freedom. Too bad they are so expensive. I would love to
>work a Go ASIC.
>
The problem in game-programming is, that there is nothing like a correct
solution (besides the rules of the game). Game-programming is trial and
error. One can make ASICs partly configurable by placing e.g. evaluation
factors in RAM. But the basic structure is fixed. The features of a progamm
are dependent on speed. A simulator which is several factors slower gives
little insight what is needed.
I think FPGA is a good compromise. One is restricted, but one trial takes
only a few hours. In the meantime I hate even this few hours for P&R. I
spent most of the time waiting for P&R to finish. But better than waiting
for weeks for a new batch of ASICs.
Someone (can't remember who) makes simulators that use an array of FPGAs to
simulate your ASIC design. Way faster than software, but still slow. Do
you do your trials on a full size board? Can you describe your
architecture?